How a Solar Cell Works: The Physics from Photons to Current

A solar cell is a diode that happens to be lit. That explains much of a datasheet: why a cell gives about 0.7 V in bright or dim light, why a hot roof loses voltage, and why no silicon cell converts all the sunlight it receives. Many explanations stop at "photons knock electrons loose"; an engineer needs the steps after that.

We build the picture in order: photons and the band gap, absorption, the p-n junction, the diode equation, then open-circuit voltage, fill factor and efficiency. Symbols are defined with SI units before any equation uses them, and every number was computed. You need school algebra, logarithms and one derivative.

The worked cell is illustrative, not a product. Module-level behaviour is in How a Solar Module Works: Cells, Bypass Diodes and the I-V Curve. Here we use CODATA constants and 300 K, where the thermal voltage kT/q (defined below) is 25.85 mV. Standard test conditions use 25 °C (298.15 K), which gives 25.69 mV, a 0.6% difference.

Light as photons and the silicon band gap

Sunlight arrives as photons, each carrying an energy set only by its wavelength. We need these symbols:

• $E$: photon energy, in joules (J) or electron-volts (eV); 1 eV = 1.602176634×10⁻¹⁹ J.
• $h$: Planck constant, 6.62607015×10⁻³⁴ J·s.
• $c$: speed of light, 299,792,458 m/s.
• $q$: elementary charge, 1.602176634×10⁻¹⁹ C.
• $\lambda$: wavelength, in metres (nanometres, nm, in tables).
• $E_g$: band gap of the semiconductor, in eV.

The photon energy is

In handy units, $E\,[\mathrm{eV}] \approx 1239.84 / \lambda\,[\mathrm{nm}]$, so a green photon at 550 nm carries 2.254 eV.

In a crystal, electrons fill a valence band. To carry current, one must cross the band gap into the conduction band, leaving a mobile hole behind. For silicon $E_g$ is about 1.12 eV at 300 K (it shrinks slightly as the cell warms). A photon creates an electron-hole pair only if $E \ge E_g$, which sets a cutoff wavelength:

Light beyond about 1,107 nm passes through, which is the first loss. The second concerns absorbed light. A 3.1 eV photon and a 1.2 eV photon each make one pair, but the blue photon's excess energy is shed as heat within picoseconds as the carrier relaxes to the band edge. This is thermalisation. Each absorbed photon yields at most $E_g$, and the wasted fraction is

Integrating a 5,778 K blackbody, a rough stand-in for sunlight, shows the scale for silicon: about 23% of incident power is in photons below the gap and another 33% is thermalised. Only about 44% remains as band-gap energy, before any voltage or fill-factor loss. Real AM1.5G sunlight differs by a few points.

Counting charge gives a useful check: one electron per photon means 800 nm light yields at most $q\lambda/(hc) = 0.645$ A/W. An M10 cell receives 1000 W/m² × 0.033124 m² = 33.1 W at one sun and delivers 13.9 A, about 0.42 A/W, which is plausible after the losses above.

Absorption and why wafers are about 170 µm thick

Above-gap photons are absorbed at different depths. The Beer–Lambert law is usually written $I(x) = I_0 e^{-\alpha x}$, but this post needs $I_0$ for the diode saturation current, so we write the light intensity as $S$:

• $S(x)$: light intensity at depth $x$ in the silicon, in W/m².
• $S_0$: intensity just inside the surface, in W/m².
• $\alpha$: absorption coefficient at that wavelength, in cm⁻¹ (1 cm⁻¹ = 100 m⁻¹).
• $x$: depth below the surface, in cm.

Assume a thin slice $\mathrm{d}x$ absorbs a fixed fraction $\alpha\,\mathrm{d}x$ of what reaches it, so $\mathrm{d}S = -\alpha S\,\mathrm{d}x$. Integrating gives

Intensity falls to 37% of $S_0$ at depth $1/\alpha$. The fraction absorbed by a wafer of thickness $W$ in a single pass is

Absorption falls steeply toward 1,100 nm because silicon has an indirect gap. The coefficients below are rounded room-temperature values and only approximate. Treat them as orders of magnitude.

Blue light is absorbed within a micrometre; near-infrared light needs a path of the order of the wafer thickness. A thicker wafer catches more 900–1,100 nm light but costs more silicon and needs a longer carrier diffusion length. A thinner one saves silicon but breaks more often. The compromise is roughly 150–180 µm, trending thinner.

Light trapping eases the trade-off. Etching the surface into random pyramids bends light obliquely and keeps it reflecting inside, so the path exceeds the thickness. A tenfold longer path turns the 1,000 nm absorption from 64% into 1 − e^−10.2, or 99.996%. The ideal ceiling is about 4n², roughly 49 times for a refractive index n near 3.5; real cells get a fraction of that. A silicon nitride coating about 75 nm thick (a quarter wavelength at 600 nm, index near 2) cuts reflection from roughly a third on bare silicon to a few percent.

Doping and the p-n junction

Electrons, holes and doping

Pure silicon has few free carriers. Define:

• $n$, $p$: free electron and hole concentrations, in cm⁻³.
• $n_i$: intrinsic carrier concentration, in cm⁻³: about 1×10¹⁰ cm⁻³ at 300 K (approximate; silicon has about 5×10²² atoms per cm³).
• $N_D$, $N_A$: donor and acceptor doping concentrations, in cm⁻³.

Phosphorus has five valence electrons. Four bond with neighbours and the fifth is almost free, giving n-type material with $n \approx N_D$. Boron has three, so each atom leaves a hole, giving p-type material with $p \approx N_A$. At 300 K nearly all dopants are ionised. At thermal equilibrium the mass-action law holds:

Worked example: a p-type base with $N_A = 10^{16}\,\mathrm{cm^{-3}}$, one boron atom per five million silicon atoms. Holes number $p \approx 10^{16}\,\mathrm{cm^{-3}}$ and the minority electrons number

Sanity check: doping raised holes a millionfold and cut electrons by the same factor. Since $n_i^2$ rises steeply with temperature, this product is the root of the temperature behaviour derived later.

The p-n junction and the built-in potential

Join an n-type layer (the thin phosphorus emitter, on a p-type wafer) to the p-type base. Electrons diffuse from the n side and holes from the p side, leaving fixed ionised dopants behind: positive donors on the n side, negative acceptors on the p side. This layer, nearly empty of mobile carriers, is the depletion region. Its electric field points from n to p and pushes electrons and holes back where they came from. That push is drift.

Equilibrium is reached when drift cancels diffusion for each carrier. Balancing the electron currents gives the potential across the junction. With $k$ the Boltzmann constant (1.380649×10⁻²³ J/K), $T$ the absolute temperature (K) and $q$ the elementary charge, the thermal voltage is $kT/q = 25.85$ mV at 300 K, and the built-in potential $V_{bi}$, in volts, is

This assumes full ionisation and non-degenerate doping. Worked example: $N_A = 10^{16}\,\mathrm{cm^{-3}}$ and $N_D = 10^{19}\,\mathrm{cm^{-3}}$, a uniform idealisation of a real diffused emitter.

Sanity check: $V_{bi}$ lies between the 0.70 V open-circuit voltage used below and the 1.12 V band gap, as it must, because the open-circuit voltage cannot exceed the built-in potential. The depletion width is about 0.34 µm for these doping levels, almost all on the lightly doped side. Any pair formed there is swept apart, electrons to the n side and holes to the p side. That separation is the photovoltaic effect. Pairs formed deeper must first diffuse to the junction within their lifetime, so material quality matters.

The diode equation and the single-diode model

In the dark the junction is an ordinary diode. Forward bias $V$ lowers the barrier from $qV_{bi}$ to $q(V_{bi} - V)$, and the minority carriers injected across rise by a factor $e^{qV/kT}$, then recombine. Shockley's analysis gives the ideal diode equation. Symbols:

• $I$: current out of the positive terminal, in amperes, counted positive in the direction light drives it.
• $V$: terminal voltage, in volts.
• $I_0$: dark saturation current, in amperes, the diode's reverse leakage.
• $n$: ideality factor, dimensionless: 1 when recombination happens outside the depletion region, rising toward 2 when it happens inside. Good silicon cells sit near 1.
• $I_L$: light-generated current, in amperes.
• $R_s$, $R_{sh}$: series and shunt resistance, in ohms.

For long, uniform regions $I_0 = qA\,n_i^2\left(\dfrac{D_n}{L_n N_A} + \dfrac{D_p}{L_p N_D}\right)$, where $A$ is the junction area and $D$ and $L$ are the minority-carrier diffusion coefficient and length. Real cells have thin, passivated regions, so this shows the structure of $I_0$, not its value. Two lessons hold: $I_0$ is proportional to $n_i^2$, and better material gives smaller $I_0$.

Now add light. Assume superposition: illumination adds a photocurrent $I_L$ independent of voltage. This is an approximation, since collection weakens slightly near maximum power, but it serves most engineering use. The illuminated cell is

Real cells also have series resistance $R_s$ (fingers, busbars, contacts, bulk) and a leakage path $R_{sh}$ (edges, defects). The diode then sees $V + IR_s$, and the shunt carries $(V + IR_s)/R_{sh}$. The single-diode model is

It has five parameters and $I$ on both sides, so it is solved by iteration. The ideal cell has $R_s = 0$ and $R_{sh} \to \infty$.

Short-circuit current and open-circuit voltage

Two points have closed forms. For short circuit, set $V = 0$ in the ideal equation; the exponential becomes 1 and the diode term vanishes:

With series resistance, the diode sees $IR_s$. For the cell below that is 13.9 A × 0.6 mΩ = 8.3 mV, giving a diode term of 2.84×10⁻¹⁰ A × (e^0.293 − 1) ≈ 1×10⁻¹⁰ A, negligible against 13.9 A. So $I_{sc} \approx I_L$, and since $I_L$ follows photon flux, $I_{sc}$ is proportional to irradiance.

For open circuit, set $I = 0$. No current crosses $R_s$, so it drops out. Neglecting the shunt path:

Physically, $V_{oc}$ is where the diode's forward current has grown to cancel the photocurrent. Because $I_L$ is about ten orders of magnitude above $I_0$, the "+1" is negligible. With $I_L$ proportional to irradiance $G$ (W/m²), two irradiances $G_1$ and $G_2$ at the same temperature differ by

Worked example, with $n = 1.1$ at 300 K so $nkT/q = 28.44$ mV, from 1000 to 200 W/m²:

Voltage falls from 0.700 V to 0.654 V, a 6.5% loss, while current falls 80%. Sanity check: each tenfold change in light moves $V_{oc}$ by 28.44 mV × ln 10 = 65.5 mV. This is why a module shows most of its open-circuit voltage at dawn or under cloud, and why inverter start-up and string design lean on voltage. The temperature side is in String Sizing for Solar Inverters.

Maximum power, fill factor and efficiency

Power $P = V \times I$ is zero at both ends of the curve, so there is a maximum between them. For the ideal cell, write $a = nkT/q$ (volts). Then $I = I_L - I_0(e^{V/a} - 1)$ and $\mathrm{d}I/\mathrm{d}V = -(I_0/a)\,e^{V/a}$. The maximum is where the derivative of power is zero:

Substituting into the cell equation with $x = V_{mp}/a$ gives $I_L + I_0 = I_0\,e^{x}(1 + x)$. Taking logarithms and using $\ln(I_L/I_0 + 1) = V_{oc}/a$ leaves

Repeated substitution converges in three or four steps. $V_{mp}$ sits a few multiples of $a$ below $V_{oc}$. Controllers that hold a string at this point, covered in MPPT Explained, search for exactly the condition $\mathrm{d}P/\mathrm{d}V = 0$.

The fill factor compares maximum power with the rectangle $V_{oc} \times I_{sc}$; efficiency compares it with the light on the cell. With $G$ in W/m² and cell area $A$ in m²:

No exact closed form for the ideal fill factor exists, but Green's empirical approximation is very good. With the normalised voltage $v_{oc} = V_{oc}/(nkT/q)$ (dimensionless), for an ideal cell without series or shunt loss:

The table checks it against the exact solution.

Agreement is about 0.01%, far inside real-world variation. A higher $V_{oc}$ also gives a squarer curve and a higher fill factor. For series resistance, a first-order estimate uses the characteristic resistance $R_{ch} = V_{oc}/I_{sc}$ and the normalised series resistance $r_s = R_s/R_{ch}$:

Worked example: an M10-format cell

Take an illustrative M10 cell, 182 mm × 182 mm, with $I_{sc} = 13.9$ A, $V_{oc} = 0.70$ V and $n = 1.1$ at 1000 W/m² and 300 K. These are typical-datasheet-style values, not a product. Use your own datasheet for real work.

Step 1: area and saturation current

The area is $A = 0.182\,\mathrm{m} \times 0.182\,\mathrm{m} = 0.033124\,\mathrm{m^2}$ (331.2 cm²), so the current density is 13.9 A / 331.2 cm² = 41.96 mA/cm², a little under the mid-40s mA/cm² ceiling for silicon. With $a = nkT/q = 1.1 \times 25.852\,\mathrm{mV} = 28.44\,\mathrm{mV}$ and $I_L \approx I_{sc}$, rearrange the open-circuit equation to back out $I_0$:

Per unit area, $J_0 = 2.84\times 10^{-10}\,\mathrm{A} / 331.2\,\mathrm{cm^2} = 8.6\times 10^{-13}\,\mathrm{A/cm^2}$. Sanity check: this is the same order as saturation current densities reported for industrial silicon cells.

Step 2: maximum power point and fill factor

With $v_{oc} = 0.70/0.02844 = 24.62$, solve the $V_{mp}$ equation for $x = V_{mp}/a$ by repeated substitution from $x_0 = 24.6$: the iterates are 21.37, 21.51, 21.50, 21.50. So $V_{mp} = 21.50 \times 28.44\,\mathrm{mV} = 0.6115$ V, and

Green's formula gives $FF_0 = (24.62 - \ln 25.34)/25.62 = 0.8348$, agreeing to three figures. The ideal cell's efficiency is

Step 3: add series and shunt resistance

The characteristic resistance is $R_{ch} = 0.70/13.9 = 0.0504\,\Omega$. Take an illustrative $R_s = 0.6$ mΩ (about 0.2 Ω·cm² over this area), so $r_s = 0.0119$ and $FF \approx 0.8348 \times (1 - 0.0119) = 0.825$. Solving the full single-diode equation numerically gives 0.824, so the first-order estimate is good to about 0.1 points. Then $P_{mp} = 0.824 \times 9.73\,\mathrm{W} = 8.02$ W and $\eta = 24.2\%$. A 50 Ω shunt takes a further 0.0007 off the fill factor, and 10 Ω takes 0.004.

At 200 W/m² the same ideal cell ($V_{oc}$ = 0.654 V, $FF_0$ = 0.826) still reaches $\eta$ = 22.7%. Real cells fall faster at low light because shunt leakage becomes a larger share of a smaller current.

Step 4: temperature

Now vary cell temperature at fixed irradiance. The key is $I_0$, which depends on $n_i^2$ and so on temperature far more strongly than $kT/q$ does. For the diffusion-dominated case ($n = 1$), a standard form is $I_0 = C\,T^{\gamma}\,e^{-E_{g0}/(kT)}$, where $C$ is a constant, $\gamma \approx 3$, and $E_{g0} \approx 1.2$ eV is the gap extrapolated linearly to 0 K. Substituting into $V_{oc} \approx (kT/q)\ln(I_L/I_0)$:

The first term is fixed and the second grows with $T$. Differentiating, and using the equation itself to eliminate the logarithm, gives

The sign is negative for a clear physical reason. As the cell warms, $I_0$ grows about 18% per kelvin (it doubles every 4 K or so), the diode leaks more, and the voltage at which its current equals $I_L$ falls. With $V_{oc} = 0.70$ V, $\gamma = 3$ and $kT/q = 0.02585$ V:

The photocurrent term adds only about +0.01 mV/K. This matches the datasheet-style figure of about −2 mV/K per cell, or −0.29%/K of 0.70 V. For a cell 40 K above 25 °C, as a hot rooftop module commonly runs:

That is an 11% voltage loss, and typical datasheet power coefficients of −0.3 to −0.35 %/K cost a similar share of power. The derivation assumes $n = 1$; a slightly higher $n$ shifts the result only a little.

Limits: where the rest of the sunlight goes

The strictest answer is the detailed-balance calculation of Shockley and Queisser (1961). It assumes a single junction, one pair per absorbed above-gap photon, complete collection, and only unavoidable radiative recombination. Even a perfect cell at 300 K must emit light, which pulls $V_{oc}$ below $E_g/q$. A low gap gives much current but little voltage, a high gap the reverse, and the product peaks near 1.34 eV at about 33% for the AM1.5G spectrum. Silicon's 1.12 eV lies close to this flat optimum. The 1961 paper used a blackbody sun, so quoted peaks range from about 30% to 34%.

Silicon has an extra intrinsic loss, Auger recombination, in which an electron and hole recombine and hand their energy to a third carrier. Including it, Richter, Hermle and Glunz (2013) calculated an upper limit of about 29.4% for a silicon cell. The budget below shows the scale. The first two rows come from the blackbody integration, so figures are approximate and row 3 is found by difference.

How PERC, TOPCon and HJT attack recombination

The saturation current $I_0$ sums all recombination in the cell, so lowering it raises $V_{oc}$. If $I_0$ falls to $I_0'$ at the same light and temperature, the voltage gain is

For the example cell, cutting $I_0$ threefold adds 28.44 mV × ln 3 = 31.2 mV; halving it adds 19.7 mV. Bulk, surface and contact recombination all add to $I_0$, and a bare metal-silicon interface is among the worst. Each design below answers one question: how do you extract current without recombination at the metal?

• PERC adds a dielectric layer (commonly aluminium oxide with silicon nitride) to the rear surface. Metal touches the silicon only through small local openings, which cuts rear-surface recombination.
• TOPCon places an ultrathin tunnel oxide, a nanometre or two thick, and doped polysilicon under the metal. Carriers tunnel to the contact while minority carriers are blocked, which strongly reduces contact recombination. Cells are generally built on n-type wafers.
• HJT (heterojunction) coats both wafer surfaces with a few nanometres of amorphous silicon. Thin intrinsic layers passivate the surface, and doped layers form the junction and contacts. It is processed at low temperature.

All three target the same loss: surface and contact recombination, which sets $V_{oc}$ and fill factor. For how these technologies appear on quotes and datasheets, including bifacial gain, see Solar Panel Types Explained: Mono PERC, TOPCon, and Bifacial.

Ray2Volt can run this kind of analysis for your own site, using your module datasheet, roof temperatures and string layout. You can book a free power audit and an engineer will work through it with you.

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